
170
XMEGA A [MANUAL]
8077I–AVR–11/2012
14.12.11 TEMP – Temporary register
The TEMP register is used for single-cycle, 16-bit access to the 16-bit timer/counter registers by the CPU. The DMA
controller has a separate temporary storage register. There is one common TEMP register for all the 16-bit Timer/counter
registers.
14.12.12 CNTL – Counter register Low
The CNTH and CNTL register pair represents the 16-bit value, CNT. CNT contains the 16-bit counter value in the
timer/counter. CPU and DMA write access has priority over count, clear, or reload of the counter.
Bit 7:0 – CNT[7:0]: Counter low byte
These bits hold the LSB of the 16-bit counter register.
14.12.13 CNTH – Counter register High
Bit 7:0 – CNT[15:8]: Counter high byte
These bits hold the MSB of the 16-bit counter register.
14.12.14 PERL – Period register Low
The PERH and PERL register pair represents the 16-bit value, PER. PER contains the 16-bit TOP value in the
timer/counter.
Bit 7:0 – PER[7:0]: Period low byte
These bits hold the LSB of the 16-bit period register.
Bit
765
432
10
+0x0F
TEMP[7:0]
Read/Write
R/W
Initial Value
000
00
Bit
765
4321
0
+0x20
CNT[7:0]
Read/Write
R/W
Initial Value
000
0000
0
Bit
76543
210
+0x21
CNT[15:8]
Read/Write
R/W
Initial Value
00000
000
Bit
765
4321
0
+0x26
PER[7:0]
Read/Write
R/W
Initial Value
111
1111
1